From: Keir Fraser Date: Wed, 14 Jan 2009 10:55:40 +0000 (+0000) Subject: x86: restore ability to work on systems without APIC X-Git-Tag: archive/raspbian/4.8.0-1+rpi1~1^2~14014^2~66 X-Git-Url: https://dgit.raspbian.org/%22http://www.example.com/cgi/success//%22http:/www.example.com/cgi/success/?a=commitdiff_plain;h=2198c5151a92991af792d436868c7acabe7b8fd6;p=xen.git x86: restore ability to work on systems without APIC This got broken with the default-enabling of MSI. Apart from fixing the base issue, the patch also addresses - the 'i' command crashing where there is no IO-APIC, - the 'i' command needlessly printing information for all 256 vectors when the use of IO-APIC(s) is disabled, and - the need to specify both "nolapic" and "noapic" when "nolapic" alone should already have the intended effect. Signed-off-by: Jan Beulich --- diff --git a/xen/arch/x86/apic.c b/xen/arch/x86/apic.c index 7376c66e7c..2bbb003eaa 100644 --- a/xen/arch/x86/apic.c +++ b/xen/arch/x86/apic.c @@ -40,7 +40,7 @@ /* * Knob to control our willingness to enable the local APIC. */ -int enable_local_apic __initdata = 0; /* -1=force-disable, +1=force-enable */ +static int enable_local_apic __initdata = 0; /* -1=force-disable, +1=force-enable */ /* * Debug level @@ -742,7 +742,7 @@ static void apic_pm_activate(void) static void __init lapic_disable(char *str) { enable_local_apic = -1; - clear_bit(X86_FEATURE_APIC, boot_cpu_data.x86_capability); + setup_clear_cpu_cap(X86_FEATURE_APIC); } custom_param("nolapic", lapic_disable); diff --git a/xen/arch/x86/cpu/common.c b/xen/arch/x86/cpu/common.c index 2fcdee836a..60fb6ccb76 100644 --- a/xen/arch/x86/cpu/common.c +++ b/xen/arch/x86/cpu/common.c @@ -29,6 +29,14 @@ struct cpu_dev * cpu_devs[X86_VENDOR_NUM] = {}; */ u64 host_pat = 0x050100070406; +static unsigned int __cpuinitdata cleared_caps[NCAPINTS]; + +void __init setup_clear_cpu_cap(unsigned int cap) +{ + __clear_bit(cap, boot_cpu_data.x86_capability); + __set_bit(cap, cleared_caps); +} + static void default_init(struct cpuinfo_x86 * c) { /* Not much we can do here... */ @@ -235,6 +243,7 @@ static void __init early_cpu_detect(void) if (c->x86 >= 0x6) c->x86_model += ((tfms >> 16) & 0xF) << 4; c->x86_mask = tfms & 15; + cap0 &= ~cleared_caps[0]; if (cap0 & (1<<19)) c->x86_cache_alignment = ((misc >> 8) & 0xff) * 8; c->x86_capability[0] = cap0; /* Added for Xen bootstrap */ @@ -395,6 +404,9 @@ void __cpuinit identify_cpu(struct cpuinfo_x86 *c) if (disable_pse) clear_bit(X86_FEATURE_PSE, c->x86_capability); + for (i = 0 ; i < NCAPINTS ; ++i) + c->x86_capability[i] &= ~cleared_caps[i]; + /* If the model name is still unset, do table lookup. */ if ( !c->x86_model_id[0] ) { char *p; diff --git a/xen/arch/x86/io_apic.c b/xen/arch/x86/io_apic.c index 035e0152eb..43ca13a2ae 100644 --- a/xen/arch/x86/io_apic.c +++ b/xen/arch/x86/io_apic.c @@ -84,7 +84,9 @@ int disable_timer_pin_1 __initdata; static struct irq_pin_list { int apic, pin, next; -} irq_2_pin[PIN_MAP_SIZE]; +} irq_2_pin[PIN_MAP_SIZE] = { + [0 ... PIN_MAP_SIZE-1].pin = -1 +}; static int irq_2_pin_free_entry = NR_IRQS; int vector_irq[NR_VECTORS] __read_mostly = { @@ -1018,11 +1020,6 @@ static void __init enable_IO_APIC(void) int i, apic; unsigned long flags; - for (i = 0; i < PIN_MAP_SIZE; i++) { - irq_2_pin[i].pin = -1; - irq_2_pin[i].next = 0; - } - /* Initialise dynamic irq_2_pin free list. */ for (i = NR_IRQS; i < PIN_MAP_SIZE; i++) irq_2_pin[i].next = i + 1; diff --git a/xen/arch/x86/irq.c b/xen/arch/x86/irq.c index 9005e2ce5c..d86ae03d32 100644 --- a/xen/arch/x86/irq.c +++ b/xen/arch/x86/irq.c @@ -867,8 +867,8 @@ int map_domain_pirq( return -EINVAL; } - old_vector = d->arch.pirq_vector[pirq]; - old_pirq = d->arch.vector_pirq[vector]; + old_vector = domain_irq_to_vector(d, pirq); + old_pirq = domain_vector_to_irq(d, vector); if ( (old_vector && (old_vector != vector) ) || (old_pirq && (old_pirq != pirq)) ) @@ -892,6 +892,10 @@ int map_domain_pirq( { struct msi_info *msi = (struct msi_info *)data; + ret = -ENODEV; + if ( !cpu_has_apic ) + goto done; + pdev = pci_get_pdev(msi->bus, msi->devfn); ret = pci_enable_msi(msi, &msi_desc); if ( ret ) @@ -937,7 +941,7 @@ int unmap_domain_pirq(struct domain *d, int pirq) ASSERT(spin_is_locked(&pcidevs_lock)); ASSERT(spin_is_locked(&d->event_lock)); - vector = d->arch.pirq_vector[pirq]; + vector = domain_irq_to_vector(d, pirq); if ( vector <= 0 ) { dprintk(XENLOG_G_ERR, "dom%d: pirq %d not mapped\n", @@ -958,7 +962,7 @@ int unmap_domain_pirq(struct domain *d, int pirq) spin_lock_irqsave(&desc->lock, flags); - BUG_ON(vector != d->arch.pirq_vector[pirq]); + BUG_ON(vector != domain_irq_to_vector(d, pirq)); if ( msi_desc ) teardown_msi_vector(vector); diff --git a/xen/arch/x86/physdev.c b/xen/arch/x86/physdev.c index 89a1d686fa..bb4d08e81b 100644 --- a/xen/arch/x86/physdev.c +++ b/xen/arch/x86/physdev.c @@ -103,14 +103,14 @@ static int physdev_map_pirq(struct physdev_map_pirq *map) spin_lock(&pcidevs_lock); /* Verify or get pirq. */ spin_lock(&d->event_lock); + pirq = domain_vector_to_irq(d, vector); if ( map->pirq < 0 ) { - if ( d->arch.vector_pirq[vector] ) + if ( pirq ) { dprintk(XENLOG_G_ERR, "dom%d: %d:%d already mapped to %d\n", d->domain_id, map->index, map->pirq, - d->arch.vector_pirq[vector]); - pirq = d->arch.vector_pirq[vector]; + pirq); if ( pirq < 0 ) { ret = -EBUSY; @@ -130,8 +130,7 @@ static int physdev_map_pirq(struct physdev_map_pirq *map) } else { - if ( d->arch.vector_pirq[vector] && - d->arch.vector_pirq[vector] != map->pirq ) + if ( pirq && pirq != map->pirq ) { dprintk(XENLOG_G_ERR, "dom%d: vector %d conflicts with irq %d\n", d->domain_id, map->index, map->pirq); diff --git a/xen/include/asm-x86/irq.h b/xen/include/asm-x86/irq.h index f0f4bfda43..8765f39061 100644 --- a/xen/include/asm-x86/irq.h +++ b/xen/include/asm-x86/irq.h @@ -61,8 +61,12 @@ int unmap_domain_pirq(struct domain *d, int pirq); int get_free_pirq(struct domain *d, int type, int index); void free_domain_pirqs(struct domain *d); -#define domain_irq_to_vector(d, irq) ((d)->arch.pirq_vector[(irq)]) -#define domain_vector_to_irq(d, vec) ((d)->arch.vector_pirq[(vec)]) +#define domain_irq_to_vector(d, irq) ((d)->arch.pirq_vector[irq] ?: \ + IO_APIC_IRQ(irq) ? 0 : LEGACY_VECTOR(irq)) +#define domain_vector_to_irq(d, vec) ((d)->arch.vector_pirq[vec] ?: \ + ((vec) < FIRST_LEGACY_VECTOR || \ + (vec) > LAST_LEGACY_VECTOR) ? \ + 0 : LEGACY_IRQ_FROM_VECTOR(vec)) int pirq_guest_force_unbind(struct domain *d, int irq); diff --git a/xen/include/asm-x86/processor.h b/xen/include/asm-x86/processor.h index d2d3c4202c..56a417d2f8 100644 --- a/xen/include/asm-x86/processor.h +++ b/xen/include/asm-x86/processor.h @@ -191,6 +191,7 @@ extern int phys_proc_id[NR_CPUS]; extern int cpu_core_id[NR_CPUS]; extern void identify_cpu(struct cpuinfo_x86 *); +extern void setup_clear_cpu_cap(unsigned int); extern void print_cpu_info(struct cpuinfo_x86 *); extern unsigned int init_intel_cacheinfo(struct cpuinfo_x86 *c); extern void dodgy_tsc(void);